George Hotz | Programming | tinygrad: a custom accelerator ASIC? we investigate with real hardware!



Date of stream 30 May 2021.
Live-stream chat added as Subtitles/CC – English (Twitch Chat).
Stream title: tinygrad: a custom accelerator ASIC? we investigate (with real hardware!) | part 2

Source files:
– https://github.com/geohot/tinygrad/tree/risk
Hardware Arty A7-100T:
– https://reference.digilentinc.com/programmable-logic/arty-a7/start
– https://www.amazon.com/Arty-A7-Artix-7-Development-Hobbyists/dp/B017BOBNEO
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24 thoughts on “George Hotz | Programming | tinygrad: a custom accelerator ASIC? we investigate with real hardware!

  1. George is working on github.com/geohot/tinygrad/tree/risk (RISC-V) | Hardware reference.digilentinc.com/programmable-logic/arty-a7/start (Arty A7-100T) | Support George by following, enabling notifications and subscribing on twitch.tv/georgehotz | Follow on instagram.com/georgehotz for instagram stories | Programming archive🡿 youtube.com/playlist?list=PLzFUMGbVxlQs5s-LNAyKgcq5SL28ZLLKC
    Apologies about the delay while uploading this.

    Not really creative commons 🙁 Here is what you missed while muted:
    https://youtu.be/NH0rWI0iCqU (Chill Lo-fi Listening | Royalty-Free Music)
    01:23:47: Let's do creative commons chill beats. There we go royalty-free music.
    01:24:10: Sounds nice
    01:24:30: This sucks. If we do version equals create sting buffer.
    01:24:50: This just doesn't work. Why?
    01:25:18: Alright someone probably already writen this.
    01:25:38: This is acually super nice and I kind of want to use this chip at comma.
    01:25:54: Alright where is that thing that I downloaded. This thing probably knows.
    01:26:14: What is this?
    01:26:26: Has someone already writen this yet? Using libftdi.
    01:26:42: I just can't believe that the board has the interface closed source.
    01:26:53: That is so annoying. Has my flash on it though.
    01:27:23: What is this? I want this but in python.
    01:27:54: Is this good? For openocd OK yea this seems good. cool.
    01:28:10: Is this going to work? I am not even need to. This might just work.
    01:28:10: Pretty sure openocd has jtag interface right
    01:28:20: Why is this stuff so hard to find?
    01:30:03: Yo I think it works maybe. Yea look at that. This is great.
    01:30:14: Yo you are bro. See you know you guys thank you for reminding me sometimes why I stream.
    01:30:21: You are not all terrible. Openocd.
    01:30:31: Not teayoflow I am thanking LuigiFCruz.
    01:30:37: Don't take credit. Alright arty a7 examples
    01:30:50: GPIO Demo I gotta use Vivado for this?
    01:31:13: Thanks BigCryptoCat.
    01:31:19: I am not really feeling that.

    https://youtu.be/cTfTjVtZO8Q (And So It Goes)
    04:25:01: No way. I never heard this before.
    https://youtu.be/FHO6a2H-pqY (Billy Joel – And So It Goes (Official Video))
    04:25:14: Sorry to copyright people.
    04:25:18: I am disrupting penelship by stealing your dog.
    04:25:21: This looks fine. It's like counting now.
    04:26:26: That's fifteen yea there we go check it out. It counts.

  2. Heya George, my kiddo would like to meet ya. Any chance we can visit for like dinner? 😁 Dad and I are both vaccinated 😎 she’s 10 and kinda learning some programming. We live out in Vallejo.

  3. These free tools which are on the internet are not extremely reliable and it is very unlikely to get a working chip on a small process node out of them.

    You will need tools from the big vendors (would recommend only 2 vendors and for some really good reasons), and not necessarily the cheapest tools.

    For the P+R (digital) on a small technology node you will find only a couple of good tools which are unbelievably important and vital but expensive.

    I will not name them here but if you will chep on some of the CAD tools (you will need quite many tools) you will pay the price on each chip or you might risk the performance being lower than expected, or in the worst case for the chip to don't even work.

    X-Fab has very reliable technologies and they are very used in the automotive and sensor industries, but not really recommended for the type of product that you are looking to build.

    A very good and not horribly expensive technology with which you would be able to achieve a good performance would be the 28nm process node from Global Foundries (28SLP or 28HPP).

    Just a small detail I would very much like to mention; in spite of the IC technologies marketing; 28/22/14/7/5 nm nodes, the transistors are not just the size of 28/22/14/7/5 nm, inside each chip you will have many different sizes and because of very good and complex reasons. (EX: inside the power block you may find the transistors which are up to multiple um W & L)

    Besides the accelerator and one or multiple cores you will need camera interfaces, I believe at least 2, and the CAN module, maybe some encryption, and multiple different HW peripherals; the memory hierarchy might be quite fun if you are not very familiar with these type of systems.

    Important Observation, not everything which is working nice and clean inside the FPGA will work nice and clear inside an ASIC, you have to think about an architecture that is actually implementable inside a chip.

    You can't just throw the modules inside the CAD tools and obtain great results out of them if the blocks were not designed to work properly to be laid down in a high-performance manner.

    I would recommend talking with someone who has experience with physical design, and who has knowledge of at least system design if not complex system design, and to help you lay down the specs and to help you at least with some guidance to choose the right technology node.

    My mentor worked for almost 40 years in this industry and most of the time the people who wanted to boil the oceans and come with something new and to build it from scratch without guidance and the project was either not usable from a software point of view or was not really achieving the expectations or not working at all.

    Best regards!

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